Oscillosopce & Logic Analyzer

UCSC Microprocessor Design Final Project
Fully Feautred & Data Analyzer 2 Channel Oscilloscope

About the Oscilloscope & Logic Analyzer

This is the final project for CMPE121/L, Microprocessor System Design. The challenge is to create a fully functioning and feature rich oscilloscope and logic analyzer. A PSoC-5, Raspberry Pi and various computer peripherals will allow for this all to happen. The oscilloscope has six main features. It can display two separately controlled waveforms. These waveforms can run in either free or trigger mode. If trigger mode is selected the trigger can be configured to either channel as well as a positive or negative trigger. The scaling of these waves can happen in both the x and y direction independently. These waves can also be moved up and down on the display independently with the use of two potentiometers (one for each wave). The features of the logic analyzer are as follows. This logic analyzer is designed to be configurable in order to analyze a variety of different logic commands. These configurable features include the number of channels read and displayed, memory depth to control the amount of data displayed, data sampling rate, X axis scale, what file to trigger from and what direction to trigger.

Skills Used

PSoC and Raspberry Pi Programming

C++

Device Communication

I2C

Configurable Program

Raspberry Pi Shell Inputs

Logic Level Design

SAR ADCs, Sigma Delta ADCs, DMAs, MUXs, Ping Pong Buffers

Contact Me

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